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Stephen Moss

Software refernce clarification

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Hello all,

I have finished transcribing the Graphics Processor and Blitter sections of the Jaguar software reference manual and I require clarification on a few points that may be inaccurate.

 

Local RAM:

On PDF Page 29 (Jag_V8) / PDF Page 32 of the Jaguar software reference manual there is a diagram of the graphics subsystem which shows local RAM to be 1K x 32, in the section “Programming the Graphics Processor” (PDF pages 32 & 35 respectively) it is also describes local RAM as being 1K of 32-bit RAM (4KB) and again in the “Memory Interface” section (PDF pages 35 & 83 respectively) local RAM is describes as 4K organised as 1K locations (presumably addresses) of 32-bit data.

 

What I am confused about is that the “Memory Interface” section goes on to show a memory map which indicates that local RAM occupies the address range $F03000 – $F03FFF which is 4K (4069, $FFF) addresses and I do not recall reading anything stating that any of these addresses are unavailable or used for another purpose. Therefore either...

1) All the indicated address are available and I need to amend the states size of local RAM to 16K or

2) Not all the address indicated for Local RAM are available in which case which addresses are available and where does it specify that as I need to amend the memory map to show the unused addresses as “reserved” (unless someone knows they serve another function).

But which one would be correct?

 

Divide Unit:

The section on the “Divide Unit” (pages 42 & 45 respectively) mention 16.16 bit values, does this mean it is a 32 bit values who’s high word is an Integer value and low word is a fractional value, i.e $0F.08 (15.08 decimal)? If not then what is a 16.16 bit value?

 

Source Z registers:

The section on the Source Z register 1 & 2 “B_SCRZ1” and “B_SCRZ2” respectively (PDF pages 76 & 64 respectively) states that they are “also used”, is the use of “also” and error and if not what else are they also used for?

 

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SCPCD    0

Hello,

 

  • Local Ram

    Local ram for GPU is 4K organised as 1K of 32bit.

    $F03000 to $F03FFF is GPU local RAM with 16-bit external memory access (32-bit internal).

    $F04000 to $F0AFFF is reserved (and have nothing internally connected)

    $F0B000 to $F0BFFF is GPU local RAM mirror with 32-bit external memory access (32-bit internal) to speed up data transfert with blitter ($F03000+$8000) (only for write operation)

    $F0C000 to $F0FFFF is reserved (and have nothing internally connected).

     

    not sure if it was the question, I haven't understand all the question :)

  • Divide Unit

    by enabling the 16.16 mode, the divide unit can compute 16.16 fixed point division.

  • Source Z registers :

    B_SRCZ1 & B_SRCZ2 are used for :

    - latch source Z value (when reading memory with SRCENZ enabled)

    - result of GOURZ computation (SRCZ1 = integer part of the GOURZ compute, SRCZ2 = fractional part of the GOURZ)

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Hello,

 

[*]Local Ram

Local ram for GPU is 4K organised as 1K of 32bit.

$F03000 to $F03FFF is GPU local RAM with 16-bit external memory access (32-bit internal).

 

Yes, that is what the document states 1K Addresses (locations) x 32 bits = 32786 / 8 = 4K bytes but...

$F03000 to $F03FFF = 4096 Addresses (locations) = x 32 bits / 8 = 16K bytes!

 

So why does document say 4K bytes only?

 

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GT Turbo    3
$F03000 to $F03FFF = 4096 bytes

 

Adress are bytes given like on some other Atari hardware.

 

 

Yes i know, but it's Atari documentation, it's normal :)

 

 

 

GT :poulpexmas:

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SCPCD    0
Yes, that is what the document states 1K Addresses (locations) x 32 bits = 32786 / 8 = 4K bytes but...

$F03000 to $F03FFF = 4096 Addresses (locations) = x 32 bits / 8 = 16K bytes!

 

So why does document say 4K bytes only?

All address in the documentation is in byte unit else it would be impossible to read/write into all the GPU/DSP memory from the 68k.

so $F03000 to $F03FFF is 4096 bytes arrenged like that from the 24-bit address source :

 

addr bits [1..0] => converted in bytes enables for the internal memory depending of the read/write mode (byte, word and longword)

addr bits [11..2] => connected to address bits of the internal memory.

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