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Posts posted by SCPCD
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Why? Obviously all the data sent from Jag to cart will go out externally too, but why should I care? Does adding a JagLink change something in the hardware side?Just say that in case of you used input in the same time.

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1) Are TxD on B49 and RxD on B50 just attached directly to the same pins as on the external network port, and can you talk to them using normal Jag networking code? Do you need to use SCK/WS with it or are they unrelated? Also, what are UARTO and UARTI for?If you use I2S, make sure that there is no bus conflict with the JagCD or the Jaguar :
you need to add extra logic to enable/disable it.
If you use UART, make sure that there is no JagLink connected to the Jaguar.
2) Am a bit unclear on ROM1 (pin A20) - is this /CS for the cart memory ICs? Can I just leave it tied low on the cart and unconnected on the cart port or is it actually used? (am running out of level translator pins
)You need the ROM1 because the bus is shared with the boot rom and also by the JagCD boot rom.
On the JagCD, there is a bit in a register to switch between the internal ROM or the external cartridge that ROM1 will control.
3) I assume they always change state together in 32-bit accesses anyway so I may be able to get away with just one…once you've told the memory controller to run in 32-bit mode are all bus accesses always 32bit from then on even if you use mv.w?If the memory controler is set to 32-bit mode, a move.w will change the state to only one, not both.
PS :
- the 68k can not make 32-bit access : a move.l is 2x16-bit access
- the blitter can made 16-bit access : depends of the configuration. (pixel mode, etc...)
4) A0 and A1 are always low for 32-bit accesses, correct? (so I only need A2 - A23 hooked up to the memory - A2 on cart port to A0 on my memory IC)for 32-bit bus, A0 and A1 is not needed because there is /EOE0 and /EOE1.
5) How do you use /EWE0, /EWE2 and ERW?like zerosquare said : /EWE0 = bits[7..0], /EWE2 = bits[23..16] it's not an error

in 32-bit bus mode, you can't write with 8-bit access.
You can only make 16-bit or 32-bit write.
ex with a 32-bit bus mode :
- 8-bit write to $800000 => KO => there is no /EWE3 on the cartridge bus but data will be available on bits[31..24]
- 8-bit write to $800001 => OK => there is /EWE2 : data will be available on bits[23..16]
- 8-bit write to $800002 => KO => there is no /EWE1 on the cartridge bus but data will be available on bits[15..8]
- 8-bit write to $800003 => OK => there is /EWE0 : data will be available on bits[7..0]
- 16-bit write to $800000 => OK => use /EWE2 : all data will be present on bits[31..16] of the bus
- 16-bit write to $800002 => OK => use /EWE0 : all data will be present on bits[15..0] of the bus.
ERW :
- 0 : write
- 1 : read
6) /RESETI is for when the cart wants to reset the Jag, but how does /RESET work?/RESET is composed by a simple RC timer follow by a trigger (74HC14) with R = 100K and C = 10uF.
So the time before the /RESET is deasserted depends of the contents of the capacity.
If the length time of /RESETI signal is too short the /RESET will be asserted during a very short time and can be not enough to reset correctly the complet logic.
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Hi,
You will find description timing of different 16-bit Object here : Op Timing
I try to make a test drawing simultaneously on a 640x240 16-bit screen that is correctly drawed :
- 2 branch object : 4+4 = 8
- one width 640pix 16-bit bitmap unscaled : 7+(2+(160-2)*3+5)+4 = 492
- one width 320pix 16-bit bitmap scaled x2 : 10+665+4 = 679cycles (include refresh)
- stop object : 10cycles
=> total = 8+492+679+10 = 1189cycles
there is about 1702 - 1189 = 513 free cycles
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New Benchmarks about the OP : (cycles are count from the GPU Clock (@26.59MHz)
ECPUCLK = 68k clock (@26.59MHz/2)
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16-bit Unscaled {Normal, Transparent or Reflect} Bitmap
- List Structure :
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Object Address :
Branch 1 : $3000
Branch 2 : $3008
Bitmap : $3010
Stop : $3030
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Bitmap :
Addr : $4518
Width : 68pix of 16-bit= 17 phrases
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Timing diagram :
A : Branch 1
B : Branch 2
C : Bitmap
D : Data Bitmap
E : Write Back Bitmap
F : Stop Object
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Cycles informations :
A -> B = 4cycles
B -> C = 4cycles
C -> D = 7cycles
first 2 phrase bitmap data read : D -> D' = 2cycles
next bitmap data read : D' -> D" = 3cycles
last bitmap data read : D"' -> E = 5cycles
E -> F = 2cycles
Stop length : F -> F' = 4cycles
Bitmap data total time : D -> E = D->D' + 15*(D'->D") + D"'->E = 2 + 15*3 + 5 = 52cycles
Total time : A->F' = A->B + B->C + C->D + D->E + E->F + F->F' = 4 + 4 + 7 + 52 + 2 + 4 = 73cycles
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16-bit Unscaled RMW {Normal, Transparent or Reflect} Bitmap
- List Structure :
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Object Address :
Branch 1 : $3000
Branch 2 : $3008
Bitmap : $3010
Stop : $3030
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Bitmap :
Addr : $4518
Width : 68pix of 16-bit= 17 phrases
RMW
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Timing diagram :
A : Branch 1
B : Branch 2
C : Bitmap
D : Data Bitmap
E : Write Back Bitmap
F : Stop Object
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Cycles informations :
A -> B = 4cycles
B -> C = 4cycles
C -> D = 7cycles
first 2 phrase bitmap data read : D -> D' = 2cycles
next bitmap data read : D' -> D" = 5cycles
then bitmap data read : D" -> D"' = 4cycles
last bitmap data read : D"" -> E = 5cycles
E -> F = 2cycles
Stop length : F -> F' = 4cycles
Bitmap data total time : D -> E = D->D' + D'->D" + 14*(D"->D"') + D""->E = 2 + 5 + 14*4 + 5 = 68cycles
Total time : A->F' = A->B + B->C + C->D + D->E + E->F + F->F' = 4 + 4 + 7 + 68 + 2 + 4 = 89cycles
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16-bit Scaledx1 {Normal, Transparent or Reflect} Bitmap
- List Structure :
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Object Address :
Branch 1 : $3010
Branch 2 : $3018
Bitmap : $3020
Stop : $3048
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Bitmap :
Addr : $4520
Width : 68pix of 16-bit= 17 phrases
Zoom : x1
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Timing diagram :
A : Branch 1
B : Branch 2
C : Bitmap
D : Data Bitmap
E : Write Back Bitmap
F : Stop Object
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Cycles informations :
A -> B = 4cycles
B -> C = 4cycles
C -> D = 10cycles
first 2 phrase bitmap data read : D -> D' = 2cycles
next bitmap data read : D' -> D" = 5cycles
then bitmap data read : D" -> D"' = 4cycles
last bitmap data read : D"" -> E = 5cycles
E -> F = 4cycles
Stop length : F -> F' = 4cycles
Bitmap data total time : D -> E = D->D' + D'->D" + 14*(D"->D"') + D""->E = 2 + 5 + 14*4 + 5 = 68cycles
Total time : A->F' = A->B + B->C + C->D + D->E + E->F + F->F' = 4 + 4 + 10 + 68 + 4 + 4 = 94cycles
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16-bit Scaledx2 {Normal, Transparent or Reflect} Bitmap
- List Structure :
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Object Address :
Branch 1 : $3010
Branch 2 : $3018
Bitmap : $3020
Stop : $3048
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Bitmap :
Addr : $4520
Width : 32pix of 16-bit= 8 phrases
Zoom : x2
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Timing diagram :
A : Branch 1
B : Branch 2
C : Bitmap
D : Data Bitmap
E : Write Back Bitmap
F : Stop Object
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Cycles informations :
A -> B = 4cycles
B -> C = 4cycles
C -> D = 10cycles
first 2 phrase bitmap data read : D -> D' = 2cycles
next bitmap data read : D' -> D" = 9cycles
then bitmap data read : D" -> D"' = 8cycles
last bitmap data read : D"" -> E = 5cycles
E -> F = 4cycles
Stop length : F -> F' = 10cycles
Bitmap data total time : D -> E = D->D' + D'->D" + 14*(D"->D"') + D""->E = 2 + 9 + 5*8 + 5 = 56cycles
Total time : A->F' = A->B + B->C + C->D + D->E + E->F + F->F' = 4 + 4 + 10 + 56 + 4 + 10 = 88cycles
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16-bit Scaledx3 {Normal, Transparent or Reflect} Bitmap
- List Structure :
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Object Address :
Branch 1 : $3010
Branch 2 : $3018
Bitmap : $3020
Stop : $3048
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Bitmap :
Addr : $4520
Width : 32pix of 16-bit= 8 phrases
Zoom : x3
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Timing diagram :
A : Branch 1
B : Branch 2
C : Bitmap
D : Data Bitmap
E : Write Back Bitmap
F : Stop Object
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Cycles informations :
A -> B = 4cycles
B -> C = 4cycles
C -> D = 10cycles
first 2 phrase bitmap data read : D -> D' = 2cycles
next bitmap data read : D' -> D" = 13cycles
then bitmap data read : D" -> D"' = 12cycles
last bitmap data read : D"" -> E = 5cycles
E -> F = 4cycles
Stop length : F -> F' = 14cycles
Bitmap data total time : D -> E = D->D' + D'->D" + 14*(D"->D"') + D"'->E = 2 + 13 + 5*12 + 5 = 80cycles
Total time : A->F' = A->B + B->C + C->D + D->E + E->F + F->F' = 4 + 4 + 10 + 80 + 4 + 14 = 116cycles
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16-bit Scaledx2 RMW {Normal, Transparent or Reflect} Bitmap
- List Structure :
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Object Address :
Branch 1 : $3010
Branch 2 : $3018
Bitmap : $3020
Stop : $3048
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Bitmap :
Addr : $4520
Width : 32pix of 16-bit= 8 phrases
Zoom : x2
RMW
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Timing diagram :
A : Branch 1
B : Branch 2
C : Bitmap
D : Data Bitmap
E : Write Back Bitmap
F : Stop Object
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Cycles informations :
A -> B = 4cycles
B -> C = 4cycles
C -> D = 10cycles
first 2 phrase bitmap data read : D -> D' = 2cycles
next bitmap data read : D' -> D" = 17cycles
then bitmap data read : D" -> D"' = 16cycles
last bitmap data read : D"" -> E = 5cycles
E -> F = 4cycles
Stop length : F -> F' = 26cycles
Bitmap data total time : D -> E = D->D' + D'->D" + 14*(D"->D"') + D"'->E = 2 + 17 + 5*16 + 5 = 104cycles
Total time : A->F' = A->B + B->C + C->D + D->E + E->F + F->F' = 4 + 4 + 10 + 104 + 4 + 26 = 152cycles
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Refresh during line drawing
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Result on a 16-bit Scaledx2 Bitmap of 320pix
- List Structure :
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Object Address :
Branch 1 : $3010
Branch 2 : $3018
Bitmap : $3020
Stop : $3048
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Bitmap :
Addr : $4520
Width : 320pix of 16-bit= 80 phrases
Zoom : x2
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Timing diagram :
A : Branch 1
B : Branch 2
C : Bitmap
D : Data Bitmap
E : Write Back Bitmap
F : Stop Object
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Cycles informations :
A -> B = 4cycles
B -> C = 4cycles
C -> D = 10cycles
first 2 phrase bitmap data read : D -> D' = 2cycles
next bitmap data read : D' -> D" = 9cycles
then bitmap data read : D" -> D"' = 8cycles
bitmap to refresh : 2cycles
refresh : 39cycles
last bitmap data read : D"" -> E = 5cycles
E -> F = 4cycles
Stop length : F -> F' = 10cycles
Bitmap data total time : D -> E = D->D' + D'->D" + (54*(D"->D"') + refresh + ) + D""->E = 2 + 9 + (54*8 + 2 + 39 + 22*8) + 5 = 665cycles
Total time : A->F' = A->B + B->C + C->D + D->E + E->F + F->F' = 4 + 4 + 10 + 665 + 4 + 10 = 697cycles
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16-bit Unscaled {Normal, Transparent or Reflect} Bitmap
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With calcul I think that this should work.
I will make some test with a logic analyzer this week-end, I don't know extacly the comportement of the OP with zoomed object.
This would give more informations than the Techrefs

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:poulpe:
:poulpe: 
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:poulpe:
:poulpe:. . .
:poulpe: 
. . . .
:poulpe:. . . . .

Happy Birthday sh3-rg !!
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happy birthday !
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Yes, it's because the jag is used in big-endian mode

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lea listbuf,a0copy address of listbuf to register a0
move.l a0,d2 ; Copycopy it to the d2 register to make some operation
add.l #(LISTSIZE-1)*8,d2 ; Address of STOP objectcompute the address of the STOP object
move.l d2,d3 ; Copy for low halfcopy it to the d3 register
d2 = d3 = abcdefghijklmnopqrstuvwxyz012345
lsr.l #8,d2 ; Shift high half into placed2 = 00000000 abcdefghijklmnopqrstuvwx
lsr.l #3,d2d2 = 00000000000 abcdefghijklmnopqrstu
swap d3 ; Place low half correctlyd3 = qrstuvwxyz012345 abcdefghijklmnop
clr.w d3d3 = qrstuvwxyz012345 0000000000000000
lsl.l #5,d3d3 = vwxyz012345 000000000000000000000
As 68k register is 32-bit you need 2 register to make a 64-bit phrase; you will have the LINK information onto 2 differents register :
=> the register d2 will be used for bit[42..32] of the phrase that represent bit[21..11] of absolute address of the next object
=> the register d3 will be used for bit[31..24] of the phrase that represent bit[10..3] of absolute address of the next object
NB :
it can have a bug if there is not masking bit for low bit[2..0] and high bit[31..22] of the address when the previous result is directly used to make the object :
if not masked, it can have wrong bits in the final object fields HEIGHT and DATA for bitmapped object for example.
final d2, d3 should be : (to avoid bugs)
d2 = 000000000000000000000 nopqrstuvwx
d3 = vwxyz012 000000000000000000000000
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Happy birthday GT !
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Hi !
The OP is only limited by the bandwidth to draw a line :
the OP need to go from the first object to the stop object in less than 64us (for PAL) and 63.5us (for NTSC) to draw a line.
there is some timing diagram for 16-bit bitmap here : http://www.jagware.org/index.php?showtopic=465
and an introduction about OP utilisation on F.Act.S demo : http://www.jagware.org/index.php?s=&sh...post&p=9308
Your problem seems to be like a misalignement somewhere or an error on the compute of the OP list.
Have you dump your OP list from the jag when there is a black screen to see if there isn't an error ?
Does your program work on PT0.5 ? on "F9" you can see the Object List
Or on VirtualJaguar you can see OP list in the vj.log.
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Happy Birthday tursi

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Happy birthday !

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Happy birthday Zerosquare !
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It turns out the answer was yes...The cart port in the schematic has D0 as A23 and D16 as A40, whereas Matthias's website has D0 as A40 and D16 as A23. The rest of the data lines seem scrambled about also. Could someone confirm if Matthias's diagram is correct?
(if so why would they use D16 for data into the E2PROM? D0 makes more sense, kinda
)Stone
The correct pinout is this one :
And EEPROM is connected like this :
EEPROM /CS = GPIO1
EEPROM CLK = GPIO0
EEPROM Data Out = E2DATA
EEPROM Data In = D0
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1) What happens to the cart bus when a cartridge asserts nRESET? I know it causes a 68k NMI but does the memory controller see it also? Does the bus freeze in its last state, get tristated, neither? Can you hold the line low forever to keep it reset forever?The RESETIL (on B33) signal is directly connected to the reset logic of the jaguar.
An assert on this signal will reset all the jag (the RESETL on B18 will be asserted to) and logically, the cartridge data line will be tristated.
It's on the RESETIL line that we add the reset button.
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Happy birthday Orion_ !!
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Happy birthday Azrael !

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Happy birthday

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Happy birthday Starcat & DSolimano !

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I think that it's a very good idea

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happy birthday
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N'anniv !

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A great game !

Matmook's day !!
in Random chatter
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Happy Birthday !